From this side, the development is done in C. In order to make this possible, there is something named Hardware Abstraction Layer (HAL), that is basically a driver interface between the software and the hardware. For each Nios 2 implementation there is a Board Support Package (BSP) created, and, inside BSP, there is the HAL libraries.
HAL Layers
When writing code (C), it is possible to choose between the HAL API or the C stantard library available. The devices drivers are something more low-level and very different from the application side. The application has, for example, the main() routine. The drivers are responsible for making device resources available to application developers, as stated in Nios II Software Developer Handbook.
ADC SPI interface only works up to 40MHz, therefore PLL is used to create a new clock frequency (40MHz).
SPI signal is delayed through the Level Shift but it is fixed in the PLL.
This is the code I’ve used for reading the ADC values and measuring the time between readings.
Is worth mentioning that, in order to use the alt_timestamp it is necessary to add a Timer Interval IP core to the system in the Platform Designer. Choose a high timeout time so it doesn’t interrupt much while CPU is executing (e.g. 1s).
Also, when alt_timestamp is initiated, a second is measured and its normal that a second using usleep() is higher than the actual time passing. The usleep() function guarantees that the delay happens but does not guarantee that the delay is not higher than it was supposed to be.